The CMOS inverter is the simplest CMOS gate, and also forms the basic structure for all CMOS logic.
Two complementary MOSFETs, a P-channel and an N-channel, are connected in series as shown above. When the input signal is HIGH, the bottom FET is on and the top FET is off, bringing the output LOW. When the input signal is LOW, the top FET is on and the bottom FET is off, bringing the output HIGH.